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Triplet Spike Time-Dependent Plasticity in a Floating-Gate Synapse

机译:浮动门突触中的三重态穗时间依赖性可塑性

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Synapse plays an important role in learning in a neural network; the learning rules that modify the synaptic strength based on the timing difference between the preand postsynaptic spike occurrence are termed spike time-dependent plasticity (STDP) rules. The most commonly used rule posits weight change based on time difference between one presynaptic spike and one postsynaptic spike and is hence termed doublet STDP (D-STDP). However, D-STDP could not reproduce results of many biological experiments; a triplet STDP (T-STDP) that considers triplets of spikes as the fundamental unit has been proposed recently to explain these observations. This paper describes the compact implementation of a synapse using a single floating-gate (FG) transistor that can store a weight in a nonvolatile manner and demonstrates the T-STDP learning rule by modifying drain voltages according to triplets of spikes. We describe a mathematical procedure to obtain control voltages for the FG device for T-STDP and also show measurement results from an FG synapse fabricated in TSMC 0.35-μm CMOS process to support the theory. Possible very large scale integration implementation of drain voltage waveform generator circuits is also presented with the simulation results.
机译:突触在神经网络的学习中起着重要作用。根据突触前和突触后突峰发生之间的时间差来修改突触强度的学习规则称为突峰时间相关可塑性(STDP)规则。最常用的规则根据一个突触前突峰和一个突触后突峰之间的时间差来确定体重变化,因此被称为双峰STDP(D-STDP)。但是,D-STDP无法重现许多生物学实验的结果。最近已经提出了一种三重态STDP(T-STDP),它以尖峰的三重峰为基本单位,以解释这些现象。本文介绍了使用单浮栅(FG)晶体管的突触的紧凑实现方式,该晶体管可以以非易失性方式存储权重,并通过根据尖峰脉冲的三重态修改漏极电压来演示T-STDP学习规则。我们描述了一种数学程序,以获得用于T-STDP的FG器件的控制电压,并且还显示了在TSMC0.35-μmCMOS工艺中制造的FG突触的测量结果,以支持该理论。仿真结果还给出了漏极电压波形发生器电路可能的超大规模集成实现。

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