Envelope Memory Polynomial Reformulation for Hardware Optimization of Analog-RF Predistortion

摘要

This letter addresses the very critical challenge facing the successful deployment of analog-RF predistortion (ARF-PD) and its hardware implementation complexity. A new envelope memory polynomial (EMP) expression is proposed to alleviate the dynamic range requirements for the analog multipliers and digital-to-analog converters. A two-step algorithm is devised to determine the coefficients of the proposed reformulated EMP within a specified hardware limitation. As proof-of-concept validation, a 20 W Doherty power amplifier driven by 20 MHz LTE signals was linearized using the conventional and newly proposed EMP expressions. An adjacent channel leakage ratio (ACLR) of dBc was achieved with a dynamic range of about 50 dB for the proposed reformulated EMP and 155 dB for the conventional formulation.