A Simulink-based hybrid codesign tool for rapid prototyping of FPGA's in signal processing systems

摘要

This paper describes a novel codesign tool for rapid prototyping FPGA's in hybrid systems (HW + SW + analog + RF + electromechanical + user interface). This tool uses Simulink~(TM) from The Mathworks as a high level description language, as well as a flexible simulation environment. After functional simulation and parameter tuning, the user partitions the system into digital HW, SW and analog HW. A performance/cost analysis of the partitioned system can then be made and architectural parameters can be optimized. After the simulation, the proposed codesign tool automatically compiles the digital HW (respectively, SW) subsystem for any user-defined FPGA (respectively, DSP/PC/microcontroller/softCore), in a rather transparent way. Analog subsystems can only be simulated but not yet compiled for analog FPGA's. The paper also shows the many advantages of the proposed codesign flow, among which, a short time-to-market, an improved flexibility and reusability, a more reliable design, a better final cost/performance ratio. The tool simulates and compiles all integer, fixed-point and floating-point data formats and all scalar, vector and matrix data which are supported by Simulink, both for HW and SW, therefore it is suited to virtually all Signal Processing algorithms. A few practical cases are described at the end of this paper.