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Ultra-thin dielectric breakdown in devices and circuits: A brief review

机译:器件和电路中的超薄介电击穿:简要回顾

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Time-dependent dielectric breakdown (TDDB), in which the traps in oxide bulk form a conducting path under application of stress voltage for long period of time, has emerged as one of the important sources of performance degradation in advanced devices. In this paper, we give an overview of the recent progress in the understanding of ultra-thin dielectric breakdown in devices and consider its impact at the circuit-level. From the device point of view, the breakdown (BD) phenomenon, including the BD statistics, trap generation models, and BD evolution in ultra-thin dielectric are presented followed by the recent studies on TDDB in high-k metal gate (HKMG) devices and magnetic tunnel junction (MTJ) memories. On the circuit side, we explore methodologies for circuit lifetime assessment, the impact of TDDB on circuit performance degradation, and design techniques to improve circuit reliability.
机译:随时间变化的介电击穿(TDDB)已经成为先进设备性能下降的重要原因之一,其中氧化物主体中的陷阱在长时间施加应力的情况下形成一条导电路径。在本文中,我们概述了在了解器件中超薄介电击穿方面的最新进展,并考虑了其在电路级的影响。从器件的角度出发,介绍了击穿(BD)现象,包括BD统计数据,陷阱生成模型和超薄电介质中的BD演变,随后对高k金属栅极(HKMG)器件中的TDDB进行了最新研究。和磁性隧道结(MTJ)存储器。在电路方面,我们探索了电路寿命评估的方法,TDDB对电路性能下降的影响以及提高电路可靠性的设计技术。

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