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首页> 外文期刊>Microelectronics journal >Novel design of a fast reversible Wallace sign multiplier circuit in nanotechnology
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Novel design of a fast reversible Wallace sign multiplier circuit in nanotechnology

机译:纳米技术中快速可逆华莱士符号乘法器电路的新颖设计

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摘要

Today, reversible logic is emerging as an intensely studied research topic, having applications in diverse fields, such as low-power design, optical information processing, and quantum computation. In this paper, we have proposed two reversible Wallace signed multiplier circuits through modified Baugh-Wooley approach, which are much better than the two available counterparts in all the terms. The multiplier is an essential building block for the construction of computational units of quantum computers. Besides, we need signed multiplier circuits for numerous operations. However, only two reversible signed multiplier circuits have been presented so far. In the first proposed architecture, our goals are to decrease the depth of the circuit and to increase the speed of the circuit. In the second proposed circuit, we aimed to improve the quantum cost, garbage outputs, and other parameters. All the proposed circuits are in the nanometric scales and can be used in the design of very complex systems.
机译:如今,可逆逻辑正在成为一个受到广泛研究的研究主题,它在低功率设计,光学信息处理和量子计算等各个领域都有应用。在本文中,我们通过改进的Baugh-Wooley方法提出了两个可逆的华莱士正负号乘法器电路,它们在所有方面均比两个可用的对应电路好得多。乘法器是构造量子计算机的计算单元的重要组成部分。此外,我们需要带符号的乘法器电路进行大量操作。然而,到目前为止,仅提出了两个可逆的符号乘法器电路。在第一个提出的架构中,我们的目标是减小电路的深度并提高电路的速度。在第二个提议的电路中,我们旨在改善量子成本,垃圾输出和其他参数。所有提出的电路都是纳米级的,可用于设计非常复杂的系统。

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