Beol processing:Surface prep, cleaning, stripping of low-k dielectrics, copper interconnects become more problematic

摘要

Whether it's in the front end or the back end of the process line, the cleaning, stripping, and other preparation of the wafer surface becomes ever-more chal-lenging as geometries shrink to 65 and 45 nm and beyond. One central ques-tion facing both ends of the line is how far existing surface conditioning tech-niques and chemistries―both wet and dry―can be extended. And when the time comes to make the jump and bring in new toolsets and processes into the fabs, which of the emerging surface technologies looks the most production worthy and economical, and at what node will it need to be introduced? In the realm of low-k dielectric ma-terials, already fragile film structures are increasingly susceptible to damage as the k-value decreases, potentially ex-acerbating defectivity and adversely affecting yields and reliability. This is especially true with the advent of porous low k, since porosity introduces a host of process integration and materials compatibility difficulties.