Optimizing the polyl doping process to reduce deep-trench resistance and leakage

摘要

Modern CMOS manufacturing processes, including those used to fabricate DRAM devices, generally use doped polysilicon as a conducting material. Another process that uses arsenic-doped polysilicon as a capacitor electrode to form a capacitor is deep-trench technology. Doped polysilicon resistance and leakage current through node dielectrics play a dominant role in preventing retention loss and maintaining signal margin in DRAM products. As design rules shrink below 110 nm, it has become more challenging to ensure lower resistance and lower leakage current through the node in the trench, which are necessary to ensure proper device operation.