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Real-time emulation of boost inverter using the Systems Modeling Language and Petri nets

机译:使用系统建模语言和Petri网对升压逆变器进行实时仿真

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摘要

A boost inverter is a versatile architecture able to supply DC or AC outputs from diverse alternative energy sources. The most relevant advantage of this multipurpose converter is to provide boosting and inversion in a single stage. The boost inverter has been studied from design and control perspectives with renewable energy sources. However, the real-time emulation of boost inverters is less widespread in literature. In this context, the main contribution of this paper is proposing an innovative methodology based on the Systems Modeling Language and Petri nets to emulate in real-time power converters using the boost inverter as a case of study. This approach develops real-time Hardware-in-the-Loop models using a graphical language and Petri nets. These graphical and Petri net features allow a formal validation of computational and time constraints before implementation in FPGA. The proposed methodology is also able to transform the developed models to the High Level Specification of Embedded Systems for automatic code generation. Comparison of real-time emulations and experimental results shows a suitable trade-off between the model accuracy and the computational time. (C) 2018 International Association for Mathematics and Computers in Simulation (IMACS). Published by Elsevier B.V. All rights reserved.
机译:升压逆变器是一种通用的体系结构,能够提供来自各种替代能源的DC或AC输出。该多功能转换器最相关的优势是可以在单级中提供升压和反相。已经从设计和控制角度对可再生能源进行了升压逆变器的研究。但是,升压逆变器的实时仿真在文献中并不普遍。在这种情况下,本文的主要贡献是提出了一种基于系统建模语言和Petri网的创新方法,以使用升压逆变器作为案例研究实时功率转换器。这种方法使用图形语言和Petri网开发实时的硬件在环模型。这些图形和Petri网功能允许在FPGA中实现之前对计算和时间约束进行正式验证。所提出的方法还能够将已开发的模型转换为用于自动代码生成的嵌入式系统高级规范。实时仿真与实验结果的比较表明,模型精度与计算时间之间是适当的折衷。 (C)2018国际模拟数学与计算机协会(IMACS)。由Elsevier B.V.发布。保留所有权利。

著录项

  • 来源
    《Mathematics and computers in simulation》 |2019年第4期|216-234|共19页
  • 作者单位

    Univ Los Andes, Dept Elect & Elect Engn, Bogota, Colombia|Univ Toulouse III, UPS, F-31400 Toulouse, France;

    Univ Los Andes, Dept Elect & Elect Engn, Bogota, Colombia;

    Univ Los Andes, Dept Elect & Elect Engn, Bogota, Colombia|CNRS, LAAS, 7 Ave Colonel Roche, F-31077 Toulouse, France;

    Univ Toulouse III, UPS, F-31400 Toulouse, France|CNRS, LAAS, 7 Ave Colonel Roche, F-31077 Toulouse, France;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    SysML; Petri net; Real-time emulation; FPGA;

    机译:SysML;Petri网络;实时仿真;FPGA;

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