...
首页> 外文期刊>Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures >Investigation of overlay errors due to the interaction of optical and extreme ultraviolet mask fabrication processes
【24h】

Investigation of overlay errors due to the interaction of optical and extreme ultraviolet mask fabrication processes

机译:研究由于光学和极紫外掩模制造工艺的相互作用而导致的覆盖误差

获取原文
获取原文并翻译 | 示例
           

摘要

Overlay tolerances are becoming increasingly severe as lithography technology drives the minimum integrated-circuit feature size below 65 nm. Manufacturable solutions at the lower nodes are essentially unknown. The goal of this article is to investigate overlay errors at the 45-nm node, for a mix-and-match of optical and extreme ultraviolet (EUV) lithographies. In particular, image placement errors induced during mask fabrication are predicted for a specified test pattern, which includes the possibility of having individual layers on the device wafer patterned by either optical or EUV lithographic processes. Finite element (FE) models have been developed to simulate the response of both optical and EUV masks during fabrication and chucking. In order to track image placement errors of the actual features within the pattern area, submodeling techniques were developed for the FE simulations. In addition, equivalent material properties were determined for the individual patterns used for the different optical and EUV masks. The FE simulations clearly indicate that the most significant source of overlay error is the fabrication of the optical reticle, primarily due to differences in chucking of the mask during e-beam patterning and exposure. Modeling results are being used by the industry to establish guidelines for reticle chucking and fabrication standards.
机译:随着光刻技术将最小集成电路特征尺寸驱动到65 nm以下,覆盖公差变得越来越严格。较低节点的可制造解决方案基本上是未知的。本文的目的是研究光学和极紫外(EUV)光刻的混合匹配在45 nm节点处的重叠误差。特别地,对于指定的测试图案,可以预测在掩模制造期间引起的图像放置误差,这包括通过光学或EUV光刻工艺在器件晶圆上形成各个层的可能性。开发了有限元(FE)模型来模拟光学和EUV掩模在制造和吸盘期间的响应。为了跟踪图案区域内实际特征的图像放置错误,开发了用于FE仿真的子建模技术。另外,对于用于不同光学和EUV掩模的各个图案,确定了等效的材料特性。有限元模拟清楚地表明,覆盖误差的最主要来源是光罩的制造,这主要是由于电子束图案化和曝光过程中掩模的卡盘差异所致。业界正在使用建模结果来建立标线卡盘和制造标准的指南。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号