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首页> 外文期刊>Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures >Process integration compatibility of low-k and ultra-low-k dielectrics
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Process integration compatibility of low-k and ultra-low-k dielectrics

机译:低k和超低k电介质的工艺集成兼容性

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摘要

Damage of plasma-enhanced chemical vapor deposited SiOCH films on exposure to typical plasma etch, plasma ash and wet clean processes are investigated. Dielectrics of k=3.0, 2.5, and 2.2 show little film damage with standard fluorine chemistry plasma etch, but experience severe film degradation on exposure to a typical oxygen plasma ash, used to remove photoresist. Effects of film damage on exposure to oxidative plasma ash include film densification, Si-OH formation, water adsorption, and dielectric constant increases. Theses effects are found to be more severe for the higher porosity, lower-k films, and are unrecoverable with thermal anneal.
机译:研究了等离子增强化学气相沉积SiOCH膜在典型的等离子蚀刻,等离子灰分和湿法清洁工艺中的损伤。 k = 3.0、2.5和2.2的电介质在标准氟化学等离子体刻蚀中几乎没有膜损坏,但是在暴露于用于去除光致抗蚀剂的典型氧等离子体灰中时,膜会严重降解。膜损伤对暴露于氧化性等离子体灰的影响包括膜致密化,Si-OH形成,水吸附和介电常数增加。对于较高的孔隙率,较低的k膜,发现这些影响更为严重,并且通过热退火无法恢复。

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