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Design and Optimization of Multiplierless FIR Filters Using Sub-Threshold Circuits

机译:使用亚阈值电路的无乘法器FIR滤波器的设计和优化

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This paper develops and demonstrates the design and optimization method for fixed coefficient Finite Impulse Response (FIR) filters using sub-threshold circuits to achieve the minimum energy per operation. Sub-threshold circuit current, delay, power consumption, energy per operation and temperature dependence are modeled theoretically and analyzed using Matlab. Then the filter design and optimization are presented. With a frequency characteristic of 80 dB magnitude and 9.6 kHz bandwidth, the 16-bit fixed-point coefficients of the linear phase equiripple low-pass filter are generated from Matlab. Canonical Signed Digit (CSD) arithmetic is used for multiplierless design to improve both cost and performance. The transposed structure and symmetry structure are applied to optimize the delay and cost further. Horner’s rule is used to improve the precision. Tree-height reduction and subexpression sharing at Register Transfer Level (RTL) are used for further delay and cost reduction. Six versions of the filter with the same group of coefficients are designed and synthesized using Design Compiler with a 65 nm process. Synthesis results show that the area of the final version is reduced by 44% compared with the original design at a fixed frequency of 250 MHz, and at the highest frequency of each design, the area is reduce by about 23% while the performance is improved by 60%. These results show the design and optimization method developed in this paper can improve both the area and performance significantly. One adder from the synthesis netlist is simulated at the transistor-level using HSPICE to obtain characteristics of sub-threshold operations. The supply voltage varies from 1.2 to 0.08 V and temperatures from 0 to 110°C. The experiment results verify most characteristics of the sub-threshold models, but also reveal some limitations and defects of the theoretical models and previous results. The observations are discussed carefully with quantitative and qualitative analysis. For 25°C, the minimum energy point for the adder is 0.22 V. Finally, the results of the adder are used to estimate the energy per operation for the filters. For a fixed frequency of 36.4 kHz at 0.22 V, the estimated energy values vary from 4.8 to about 2.7 pJ for the six designed filters.
机译:本文开发并演示了使用亚阈值电路的固定系数有限冲激响应(FIR)滤波器的设计和优化方法,以实现每次操作的最小能量。理论上对亚阈值电路电流,延迟,功耗,每操作能量和温度依赖性进行了建模,并使用Matlab进行了分析。然后介绍了滤波器的设计和优化。具有80 dB幅度和9.6 kHz带宽的频率特性,线性相位等波纹低通滤波器的16位定点系数由Matlab生成。规范符号数字(CSD)算法用于无乘法器设计,以提高成本和性能。应用转置结构和对称结构可以进一步优化延迟和成本。霍纳法则用于提高精度。在寄存器传输级别(RTL)上减少树高和子表达式共享可进一步降低延迟和降低成本。使用Design Compiler以65 nm工艺设计并合成了具有相同系数组的六个版本的滤波器。综合结果表明,在250 MHz的固定频率下,最终版本的面积与原始设计相比减少了44%,在每种设计的最高频率下,面积都减少了约23%,同时性能得到了改善减少了60%这些结果表明,本文开发的设计和优化方法可以显着改善面积和性能。使用HSPICE在晶体管级对来自综合网表的一个加法器进行了仿真,以获得亚阈值操作的特性。电源电压在1.2至0.08 V之间变化,温度在0至110°C之间。实验结果验证了亚阈值模型的大多数特征,但也揭示了理论模型和先前结果的局限性和缺陷。通过定量和定性分析仔细讨论了观察结果。对于25°C,加法器的最小能量点为0.22V。最后,加法器的结果用于估算滤波器每次操作的能量。对于0.22 V下36.4 kHz的固定频率,六个设计的滤波器的估计能量值从4.8到大约2.7 pJ不等。

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