...
首页> 外文期刊>Journal of Real-Time Image Processing >Flexible VLIW processor based on FPGA for efficient embedded real-time image processing
【24h】

Flexible VLIW processor based on FPGA for efficient embedded real-time image processing

机译:基于FPGA的灵活VLIW处理器,用于高效的嵌入式实时图像处理

获取原文
获取原文并翻译 | 示例
   

获取外文期刊封面封底 >>

       

摘要

Modern field programmable gate array (FPGA) chips, with their larger memory capacity and reconfigurability potential, are opening new frontiers in rapid prototyping of embedded systems. With the advent of high-density FPGAs, it is now possible to implement a high-performance VLIW (very long instruction word) processor core in an FPGA. With VLIW architecture, the processor effectiveness depends on the ability of compilers to provide sufficient ILP (instruction-level parallelism) from program code. This paper describes research result about enabling the VLIW processor model for real-time processing applications by exploiting FPGA technology. Our goals are to keep the flexibility of processors to shorten the development cycle, and to use the powerful FPGA resources to increase real-time performance. We present a flexible VLIW VHDL processor model with a variable instruction set and a customizable architecture which allows exploiting intrinsic parallelism of a target application using advanced compiler technology and implementing it in an optimal manner on FPGA. Some common algorithms of image processing were tested and validated using the proposed development cycle. We also realized the rapid prototyping of embedded contactless palmprint extraction on an FPGA Virtex-6 based board for a biometric application and obtained a processing time of 145.6 ms per image. Our approach applies some criteria for co-design tools: flexibility, modularity, performance, and reusability.
机译:具有更大存储容量和可重构性的现代现场可编程门阵列(FPGA)芯片为嵌入式系统的快速原型开发开辟了新的领域。随着高密度FPGA的出现,现在可以在FPGA中实现高性能的VLIW(超长指令字)处理器内核。使用VLIW体系结构,处理器的效率取决于编译器从程序代码提供足够的ILP(指令级并行性)的能力。本文介绍了有关通过利用FPGA技术为实时处理应用启用VLIW处理器模型的研究结果。我们的目标是保持处理器的灵活性,以缩短开发周期,并使用强大的FPGA资源来提高实时性能。我们提供了具有可变指令集和可定制架构的灵活VLIW VHDL处理器模型,该模型允许使用高级编译器技术利用目标应用程序的固有并行性,并以最佳方式在FPGA上实现它。使用提出的开发周期对一些常见的图像处理算法进行了测试和验证。我们还实现了在基于FPGA Virtex-6的板上用于生物识别应用的嵌入式非接触式掌纹提取的快速原型设计,并且每个图像的处理时间为145.6 ms。我们的方法对协同设计工具应用了一些标准:灵活性,模块化,性能和可重用性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号