Alternate lanthanum oxide/silicon oxynitride-based gate stack performance enhancement due to ultrathin oxynitride interfacial layer for CMOS applications

摘要

Metal-insulator-semiconductor (MIS)-based Pt/La_2O_3/SiO_XN_Y/p-Si/Pt structures are fabricated using ultrathin silicon oxynitride (SiO_XN_Y～4 nm) interfacial layer underneath of lanthanum (III) oxide (La_2O_3～7.8 nm) with Pt as gate electrode for CMOS applications. Capacitance-voltage (C-V) characteristics of Pt/La_2O_3/SiO_XN_Y/p-Si/Pt at 500 kHz showed a positive gate bias threshold voltage (V_(th)) shift of ～0.43 V (～43.8%) and flat-band (V_(ft)) shift of ～ 1.24 V (～42.3%) as compared to Pt/ La_2O_3/p-Si/Pt MIS structures, attributing to the reduction in effective positive oxide charges at La_2O_3/SiO_XN_Y/Si gate stack. Likewise, conductance-voltage (G-V) characteristics show ～0.56 (～44.4%) reduction in FWHM for Pt/La_2O_3/SiO_XN_Y/p-Si/Pt as compared to Pt/La_2O_3/p-Si/Pt MIS structures revealing the reduction in interface states at La_2O_3/SiO_XN_Y/Si interface. There is a considerable reduction of effective oxide charge concentration (N_(eff))～3.99 × 10~(10) cm~(-2) by (～ 15.2%) and ～56.8% lower gate leakage current density ～4.47 × 10~(-7) A/cm~2 (|J|-V) at - 1 V for SiO_XN～Y based MIS structures w.r.t its counterpart. Capacitance-time (C-t) characteristics, constant voltage stress (CVS) and temperature measurements for C-V and |J|-V demonstrate the considerable retention ～ 12 years, electrical improvement and reliability of MIS structures. The depth profile analysis X-ray photoelectron spectroscopy (XPS) for SiO_XN_Y/Si gate stack clearly reveals that less nitrogen concentration in bulk than SiO_XN_Y/Si interface. Atomic force microscopy (AFM) micrographs of La_2O_3/Si and SiO_XN_Y/Si showed the significantly lesser r.m.s roughness of v 1.11 ± 0.39 nm and ～ 0.97 ±0.11 nm, respectively. Thus, the ultrathin SiO_XN_Y interfacial layer underneath of La_2O_3 demonstrates a significantly improved electrical performance and prelude the gate stack strong potential for reliable CMOS logic devices and integrated circuits.