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Implementation of 5.0GHz Wide Band RF Frequency Synthesizer for USN Sensor Nodes

机译:USN传感器节点的5.0GHz宽带RF频率合成器的实现

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This paper describes implementation of the 5.0GHz RF frequency synthesizer with 0.18μn silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with Σ-Δ modulator, and common circuits of the PLL has been optimized. Especially to get excellent performance of high speed and wide tuning range, N-P MOS core structure and 12 step cap banks have been used in design of the VCO. The chip area including pads for testing is 1.1*0.7mm~2, and the chip area only core for IP in SoC is 1.0*0.4mm~2. Through analysing of the fabricated frequency synthesizer, we can see that it has wide operation range and excellent frequency characteristics.
机译:本文介绍了采用0.18μn硅CMOS技术的5.0GHz RF频率合成器的实现,该技术被用作IEEE802.15.4 USN传感器节点收发器模块的应用。为了获得良好的速度和噪声性能,对每个模块的设计进行了优化,例如VCO,预分频器,1 / N分频器,带Σ-Δ调制器的分数分频器以及PLL的通用电路。特别是为了获得出色的高速性能和宽调谐范围,在VCO的设计中使用了N-P MOS磁芯结构和12个台阶电容组。包括测试用焊盘在内的芯片面积为1.1 * 0.7mm〜2,而SoC中IP的唯一核心芯片面积为1.0 * 0.4mm〜2。通过对所制造的频率合成器的分析,可以看出它具有宽的工作范围和出色的频率特性。

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