机译:LTE Turbo码低延迟低内存速率匹配的实现
Department of Computer Science and Technology, Beijing University of Chemical Technology Beijing 100029, China;
Department of Computer Science and Technology, Beijing University of Chemical Technology Beijing 100029, China;
Beijing Key Laboratory of Network System Architecture and Convergence, Beijing University of Posts and Telecommunications, Beijing 100876, China;
Rate Matching; Sub-block Interleaving; Mapping Relationship; Turbo Code;
机译:使用单个MAP解码器的低延迟Turbo解码器的并发算法和硬件实现
机译:一种高效,低复杂度,低延迟的体系结构,用于使用高速缓存存储器匹配用纠错码编码的数据
机译:低功耗LTE-Advanced Turbo解码器的反向速率匹配
机译:LTE Turbo码速率匹配的高效实现
机译:低延迟Turbo解码器
机译:了解在压力下编码的中性信息的内存的低可靠性:海马和中脑的记忆相关激活的变化。
机译:低延迟,低功耗应用的Turbo码实现问题