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机译:随机变异性建模及其对比例CMOS电路的影响
School of Electrical, Computer and Energy Engineering (ECEE),Arizona State University, Tempe, AZ 85287-5706, USA;
School of Electrical, Computer and Energy Engineering (ECEE),Arizona State University, Tempe, AZ 85287-5706, USA;
School of Electrical, Computer and Energy Engineering (ECEE),Arizona State University, Tempe, AZ 85287-5706, USA;
School of Electrical, Computer and Energy Engineering (ECEE),Arizona State University, Tempe, AZ 85287-5706, USA;
School of Electrical, Computer and Energy Engineering (ECEE),Arizona State University, Tempe, AZ 85287-5706, USA;
threshold variation; random dopant fluctuation; line-edge roughness; oxide thickness fluctuation; atomistic simulation; predictive modeling; inverter; SRAM performance variability;
机译:NBTI引起的纳米级CMOS器件动态变化的研究:建模,实验证据以及对电路的影响
机译:比例混合RS / CMOS纳米电子电路中多级开关的可变性:理论
机译:近阈值CMOS数字电路中的可变性建模
机译:纳米级CMOS数字和高频集成电路随机掺杂诱导特性变异性的大规模原子方法
机译:规模化CMOS设计中有效电路可变性分析的分析方法。
机译:具有混合CMOS /忆阻器电路的Hopfield网络模数转换器的建模和实验演示
机译:研究技术扩展对低压静态CMOS电路中作为短路电流浪费的功率的影响