Novel designs of a carry/borrow look-ahead adder/subtractor using reversible gates

摘要

Reversible logic has received great attention in recent years due to its ability to reduce power consumption. Reversible logic improves energy efficiency, velocity of nano-circuits and the portability. We can construct irreversible circuits using reversible gates. Adders are one of the most important elements of digital circuits. Among all different types of adders, carry-look-ahead adder is the fastest. This paper presents new designs of a reversible carry-look-ahead adder with better performance compared to the existing designs, then using 2's complement method, a reversible carry/borrow look-ahead adder/subtractor is designed. The proposed designs are simulated by VHDL, and the results are compared to the existing designs.