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I/f~3 (Close-in) Phase Noise Reduction by Tail Transistor Flicker Noise Suppression Technique

机译:I / F〜3(近距离)通过尾晶体管闪烁噪声抑制技术减少

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In this paper, a novel circuit method is proposed to reduce 1/f~3 (close-in) phase noise in a cross-coupled LC Voltage Control Oscillator (VCO) by suppressing flicker noise power of the tail transistor. Using an added resistor between drain and gate of the tail transistor, that works as a negative feedback, the tail transistor flicker noise is suppressed, and therefore, the 1/f~3 output phase noise is reduced by 5.7 dB. Also, the added resistor helps in better tail current shaping for phase noise reduction. The proposed oscillator is designed in a 0.18 μm CMOS technology with 1.8 V supply and 3.6 mW power consumption. Post-layout simulations predict a phase noise of -104MdBc/Hz for the proposed oscillator at 100 KHz offset from 3.1GHz carrier frequency. Mathematical analysis is included in the paper for confirmation of the phase noise performance enhancement. The Figure of Merit (FOM) of the proposed oscillator is 188.3 and 190.0 dBc/Hz at 100 KHz and 1 MHz offsets, respectively.
机译:在本文中,提出了一种新的电路方法,通过抑制尾晶体管的闪烁噪声功率来减少交叉耦合的LC电压控制振荡器(VCO)中的1 / f〜3(近距离)相位噪声。在尾晶体管的漏极和栅极之间使用添加的电阻,其用作负反馈,禁止尾晶体管闪烁噪声,因此,1 / F〜3输出相位噪声减少了5.7dB。此外,添加的电阻器有助于更好的尾电流成形,用于相位降噪。所提出的振荡器采用0.18μm的CMOS技术设计,具有1.8 V电源和3.6 MW功耗。后布局模拟预测所提出的振荡器的-104MDBC / Hz的相位噪声,从3.1GHz载波频率的100kHz偏移量。本文包含数学分析,用于确认相位噪声性能增强。所提出的振荡器的优点(FOM)图分别为188.3和190.0dBc / Hz,分别为100 kHz和1 MHz偏移。

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