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PIPELINED ARCHITECTURES FOR TRANSFORM DOMAIN LMS ADAPTIVE FILTERING

机译:用于变换域LMS自适应过滤的流水线架构

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In this paper, efficient pipelined architectures for the implementation of the Transform Domain LMS (TD-LMS) adaptive filter are considered. Pipelining of the TD-LMS algorithm is achieved by introducing an amount of time delay into the original adaptive scheme. The resulting algorithm, called thereafter the delayed TD-LMS, performs adaptive filtering with delayed coefficients adaptation. A statistical performance analysis of the proposed delayed TD-LMS adaptive algorithm is presented, both for the mean error and the mean squared error of the filter coefficients. A closed form expression is derived for the estimation of the steady state excess mean squared error, in terms of the adaptation delay and the input signal characteristics. The adaptation delay introduced to the delayed TD-LMS algorithm is subsequently utilized for the development of pipelined architectures. By retiming the delays existing in the error signal feedback loop, efficient pipelined implementations of the delayed TD-LMS algorithm are developed. The proposed architectures are suitable for parallel implementation on a general-purpose parallel machine, or on dedicated hardware, integrated on ASIC or ASIP VLSI processors.
机译:在本文中,考虑了用于实现变换域LMS(TD-LMS)自适应滤波器的高效流水线架构。 TD-LMS算法的流水线是通过将一定的时间延迟引入原始自适应方案中来实现的。所得的算法(以下称为延迟TD-LMS)执行具有延迟系数自适应的自适应滤波。针对滤波系数的均值误差和均方误差,对提出的时延TD-LMS自适应算法进行了统计性能分析。根据自适应延迟和输入信号特性,导出了一个封闭形式的表达式,用于估算稳态过量均方误差。引入延迟TD-LMS算法的自适应延迟随后用于流水线架构的开发。通过重新计时误差信号反馈环路中存在的延迟,开发了延迟TD-LMS算法的有效流水线实现。所提出的体系结构适合在通用并行机或专用硬件上并行实现,并集成在ASIC或ASIP VLSI处理器上。

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