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Elimination Of Time Delay In Digital Control Loop Of Switching Dc-dc Converters

机译:消除开关DC-DC转换器数字控制环路中的时间延迟

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Time delay introduced by sampling and calculation exists between the perturbation and the duty ratio updating in the digital control loop. This time delay degrades the transient performance of digital control switching power supplies. By overcoming the sampling and calculation time effect and to calibrate the ripple that occurs during switching cycles, new control algorithm is proposed in this paper to improve the transient performance of switching power supplies by eliminating the time delay in the control loop. Simulation results show the improvement of load transient performance by the proposed algorithms. Experimental system is also set up to verify the analysis and computer simulation results.
机译:在数字控制回路中,在摄动和占空比更新之间存在采样和计算引入的时间延迟。该时间延迟会降低数字控制开关电源的瞬态性能。通过克服采样和计算时间的影响并校准开关周期中发生的纹波,本文提出了一种新的控制算法,通过消除控制环路中的时间延迟来改善开关电源的瞬态性能。仿真结果表明,所提算法可以改善负载暂态性能。还建立了实验系统,以验证分析和计算机仿真结果。

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