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The effect of interlevel dielectric on the critical tensile stress to void nucleation for the reliability of Cu interconnects

机译:层间电介质对铜互连可靠性的临界拉伸应力到空核的影响

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We have conducted electromigration experiments and modeling on Cu Damascene structures surrounded by different interlevel dielectric ILD and Cu-cap materials. We have determined the mechanical properties of the surrounding ILD and Cu cap to play a key role in the critical stress change to void nucleation (Δσ_(crit)), which is one of the critical parameters in determining electromigration lifetime or any other void-limited lifetime. Specifically, we found that Δσ_(crit) decreases as the Young's modulus of the interlevel dielectric decreases, which is the case with low-k materials. In order to compensate for the lower threshold to void nucleation in low-k materials, a stronger emphasis needs to be placed on the quality or adhesion of the Cu/cap interface, which is currently the preferred site for void nucleation, so that interconnects fabricated in low-k materials continue to meet the ever-increasing electromigration reliability requirements. Finally, the methodology developed in this study, which is based on experiment and modeling, can be used to determine Δσ_(crit), and therefore the critical jL product, for any combination of ILD and Cu-cap materials.
机译:我们对被不同层间介电层间介电层和铜帽材料包围的铜镶嵌结构进行了电迁移实验和建模。我们已经确定了周围的ILD和Cu帽的机械性能在临界应力变化为空核(Δσ_(crit))中起关键作用,这是确定电迁移寿命或任何其他空限的关键参数之一一生。具体而言,我们发现,随着层间电介质的杨氏模量降低,Δσ_(crit)降低,这是低k材料的情况。为了补偿低k材料中空核成核的较低阈值,需要更加重视Cu / cap界面的质量或附着力,而Cu / cap界面目前是空核成核的首选​​位置,因此可以制造互连在低k材料中继续满足日益增长的电迁移可靠性要求。最后,在本研究中开发的基于实验和建模的方法可以用于确定ILD和Cu-cap材料的任何组合的Δσ_(crit),从而确定关键的jL乘积。

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