首页> 外文期刊>Japanese Journal of Applied Physics. Part 1, Regular Papers, Brief Communications & Review Papers >Roles of Ti, TiN, and WN as an Interdiffusion Barrier for Tungsten Dual Polygate Stack in Memory Devices
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Roles of Ti, TiN, and WN as an Interdiffusion Barrier for Tungsten Dual Polygate Stack in Memory Devices

机译:Ti,TiN和WN作为钨双多晶硅栅堆叠在存储设备中的互扩散壁垒

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摘要

Tungsten dual polygate (W-DPG) stacks with diffusion barriers formed by the Ti(N) process were investigated in terms of gate contact resistance (R_c) and the polydepletion effect. The Ti layer in the Ti/WN diffusion barrier is found to be converted into a TiSi_x/TiN bilayer during the postdeposition annealing process. The TiSi_x reaction between Ti and p+ polycrystalline silicon (poly-Si) effectively prevents the formation of a parasitic dielectric layer, which could lead to low-gate R_c. The TiN reaction between Ti and WN minimizes the occurrence of the TiSi_x reaction, which effectively reduces p+ polydepletion caused by the out-diffusion of boron during the postdeposition annealing process. Therefore, poly-Si/Ti/WN/W could be a promising tungsten dual polygate stack, which satisfies high-speed requirements in dynamic random-access memory (DRAM) devices.
机译:通过栅接触电阻(R_c)和多晶硅耗尽效应研究了具有Ti(N)工艺形成的扩散势垒的钨双多晶硅栅(W-DPG)堆叠。发现在沉积后退火过程中,Ti / WN扩散阻挡层中的Ti层转化为TiSi_x / TiN双层。 Ti和p +多晶硅(poly-Si)之间的TiSi_x反应有效地防止了寄生介电层的形成,这可能导致低栅极R_c。 Ti和WN之间的TiN反应可最大程度地减少TiSi_x反应的发生,从而有效地减少在后沉积退火过程中硼向外扩散引起的p +多耗尽。因此,poly-Si / Ti / WN / W可能是有前途的钨双多晶硅栅堆叠,可满足动态随机存取存储器(DRAM)器件的高速需求。

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