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首页> 外文期刊>Japanese journal of applied physics >Investigation of Hot-Carrier-Induced Degradation Mechanisms in p-Type High-Voltage Drain Extended Metal-Oxide-Semiconductor Transistors
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Investigation of Hot-Carrier-Induced Degradation Mechanisms in p-Type High-Voltage Drain Extended Metal-Oxide-Semiconductor Transistors

机译:p型高压漏极扩展金属氧化物半导体晶体管中热载流子降解机理的研究

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摘要

Hot-carrier-induced degradation in p-type drain extended metal-oxide-semiconductor (DEMOS) devices is investigated. The gate voltage biased at the second substrate current peak produces the most device degradation. The generation of interface state (△N_(it)) in the channel region, △N_(it) in the drift region under poly-gate, and negative oxide-trapped charge (△N_(ot)) in the drift region outside poly-gate are responsible for device parameter degradation. △N_(it) in the channel region causes threshold voltage and maximum transconductance degradation. △N_(ot) in the drift region outside poly-gate leads to the increase of linear drain current (I_(dilin)) at the beginning of stress. △N_(it) in the drift region under poly-gate results in the turnaround behavior of |I_(dlin)| shift as the stress time is longer.
机译:研究了p型漏极扩展金属氧化物半导体(DEMOS)器件中热载流子引起的降解。偏置在第二衬底电流峰值处的栅极电压产生最大的器件劣化。沟道区的界面态(△N_(it))的产生,多晶硅栅下的漂移区中的△N_(it)的产生,多晶硅外面的漂移区中的负氧化物俘获电荷(△N_(ot))的产生-gate负责降低设备参数。沟道区域中的△N_(it)导致阈值电压和最大跨导降级。多晶硅栅外部漂移区中的△N_(ot)导致应力开始时线性漏极电流(I_(dilin))的增加。多晶硅栅下漂移区中的△N_(it)导致| I_(dlin)|的周转行为。压力时间越长,位移越大。

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  • 来源
    《Japanese journal of applied physics》 |2009年第4issue2期|178-181|共4页
  • 作者单位

    Institute of Microelectronics, Department of Electrical Engineering, and Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 701, Taiwan;

    Institute of Microelectronics, Department of Electrical Engineering, and Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 701, Taiwan;

    Taiwan Semiconductor Manufacturing Company, Hsinchu 300, Taiwan;

    Taiwan Semiconductor Manufacturing Company, Hsinchu 300, Taiwan;

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