Mechanisms of Hot-Carrier-Induced Threshold-Voltage Shift in High-Voltage p-Type LDMOS Transistors

摘要

The phenomena and mechanisms of hot-carrier-induced threshold-voltage $(V_{T})$ shift in high-voltage p-type laterally diffused MOS (LDMOS) transistors are investigated. At low-$vert V_{rm gs}vert$ (absolute value of gate voltage) stress condition, electrons are injected and trapped in the gate oxide at the channel region near the drain, resulting in $V_{T}$ increase $(Deltavert V_{T}vert ≪ hbox{0})$. At high-$vert V_{rm gs}vert$ stress condition, however, severe $V_{T}$ decrease $(Deltavert V_{T}vert ≫ hbox{0})$ is found after stress. Experimental results suggest that donor-type interface traps created by hole injection in the channel region is the dominant factor for $V_{T}$ decrease.