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High-Voltage-Tolerant Level Converter for Embedded Complementary Metal-Oxide-Semiconductor Nonvolatile Memories

机译:嵌入式互补金属氧化物半导体非易失性存储器的耐高压电平转换器

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摘要

In this paper, a high-voltage-tolerant level converter for embedded complementary metal-oxide-semiconductor (CMOS) nonvolatile memories is proposed. The level converter circuit includes a high-voltage driver and a level shifter, which makes use of 1 x V_(dd) devices to generate 2 x V_(dd) signals without overstress. In addition, it features one select signal to make the level converter have the tri-state. The high-voltage driver efficiently stacks two transistors to allow a voltage drop of V_(dd) for each transistor, which helps maximize the driving ability. The level shifter using the cross-coupled structure with small metal-oxide-semiconductor (MOS) capacitors drives the high-voltage driver without the "preconditioning" process. The level converter implemented using the 0.35 um CMOS process on the area of 0.002 mm2 was measured at V_(dd) = 3.5 V to generate the output signal swinging from 0 to 7 V.
机译:本文提出了一种用于嵌入式互补金属氧化物半导体(CMOS)非易失性存储器的耐压电平转换器。电平转换器电路包括一个高压驱动器和一个电平转换器,它们利用1个V_(dd)器件生成2个V_(dd)信号而不会产生过大的应力。此外,它具有一个选择信号,使电平转换器具有三态。高压驱动器有效地堆叠两个晶体管,以使每个晶​​体管的压降为V_(dd),这有助于最大化驱动能力。使用具有小型金属氧化物半导体(MOS)电容器的交叉耦合结构的电平转换器驱动高压驱动器,而无需进行“预处理”过程。在V_(dd)= 3.5 V时测量了使用0.35 um CMOS工艺在0.002 mm2面积上实现的电平转换器,以产生从0到7 V摆幅的输出信号。

著录项

  • 来源
    《Japanese journal of applied physics》 |2012年第2issue2期|p.02BE08.1-02BE08.4|共4页
  • 作者

    Chih Yang Huang; Hongchin Lin;

  • 作者单位

    Department of Electrical Engineering, National Chung Hsing University, Taichung 402, Taiwan;

    Department of Electrical Engineering, National Chung Hsing University, Taichung 402, Taiwan;

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  • 正文语种 eng
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