Fabrication and Characterization of Metal-Ferroelectric-lnsulator-Semiconductor Capacitor Structure with Ferroelectric (Bi,Pr)(Fe,Mn)O_3 Thin Films

摘要

(Bi,Pr)(Fe,Mn)O_3 (BPFM) thin films were deposited on SiO_2/Si substrates by a chemical solution deposition method, resulting in the metal-ferroelectric-insulator-semiconductor (MFIS) capacitor structure. Polycrystalline BPFM films were grown on the substrate without impurity phases. Comparing with the capacitance vs voltage (C-V) curves of the MFIS capacitor structures with and without the BPFM self-barrier layer, the BPFM self-barrier layer suppress the formation of charge trap sites in the interface between the BPFM and SiO_2 layers of the present structure, resulting in the prepared MFIS capacitor structure showing a clockwise C-V hysteresis behavior due to remnant polarization of the BPFM layer. The memory window width in the C-V curve was approximately 0.5 V for the bias voltage sweep from -20 to +20 V.