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首页> 外文期刊>International Journal of Pattern Recognition and Artificial Intelligence >Facilitating High-Performance Image Analysis on Reduced Hypercube (RH) Parallel Computers
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Facilitating High-Performance Image Analysis on Reduced Hypercube (RH) Parallel Computers

机译:简化的超立方体(RH)并行计算机上的高性能图像分析

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The direct binary hypercube interconnection network has been very popular for the design of parallel computers, because it provides a low diameter and can emulate efficiently the majority of the topologies frequently employed in the development of algorithms. The last fifteen years have seen major efforts to develop image analysis algorithms for hypercube-based parallel computers. The results of these efforts have culminated in a large number of publications included in prestigious scholarly journals and conference proceedings. Nevertheless, the aforementioned powerful properties of the hypercube come at the cost of high VLSI complexity due to the increase in the number of communication ports and channels per PE (processing element) with an increase in the total number of PE's. The high VLSI complexity of hypercube systems is undoubtedly their dominant drawback; it results in the construction of systems that contain either a large number of primitive PE's or a small number of powerful PE's. Therefore, low-dimensional k-ary n-cubes with lower VSLI complexity have recently drawn the attention of many designers of parallel computers. Alternative solutions reduce the hypercube's VLSI complexity without jeopardizing its performance. Such an effort by Ziavras has resulted in the introduction of reduced hypercubes (RH's). Taking advantage of existing high-performance routing techniques, such as wormhole routing, an RH is obtained by a uniform reduction in the number of edges for each hypercube node. An RH can also be viewed as several connected copies of the well-known cube-connected-cycles network. The objective here is to prove that parallel computers comprising RH interconnection networks are definitely good choices for all levels of image analysis. Since the exact requirements of high-level image analysis are difficult to identify, but it is believed that versatile interconnection networks, such as the hypercube, are suitable for relevant tasks, we investigate the problem of emulating hypercubes on RH's. The ring (or linear array), the torus (or mesh), and the binary tree are the most frequently used topologies for the development of algorithms in low-level and intermediate-level image analysis. Thus, to prove the viability of the RH for the two lower levels of image analysis, we introduce techniques for embedding the aforementioned three topologies into RH's. The results prove the suitability of RH's for all levels of image analysis.
机译:直接二进制超立方体互连网络在并行计算机的设计中非常受欢迎,因为它直径小并且可以有效地模拟算法开发中经常采用的大多数拓扑。在过去的十五年中,我们为基于超立方体的并行计算机开发图像分析算法做出了巨大努力。这些努力的结果最终是在著名的学术期刊和会议论文集中发表了大量出版物。然而,由于每个PE(处理元件)的通信端口和通道数量的增加以及PE总数的增加,上述超立方体的强大特性是以高VLSI复杂性为代价的。超立方体系统的高VLSI复杂性无疑是它们的主要缺点。它导致了包含大量原始PE或少量功能强大PE的系统的构建。因此,具有较低VSLI复杂度的低维k元n立方体最近引起了许多并行计算机设计者的关注。替代解决方案可降低超立方体的VLSI复杂性,而不会损害其性能。 Ziavras的这种努力已导致减少超立方体(RH)的引入。利用现有的高性能路由技术(例如,虫洞路由),可以通过均匀减少每个超立方体节点的边数来获得RH。 RH也可以看作是众所周知的立方体连接循环网络的多个连接副本。此处的目的是证明包含RH互连网络的并行计算机绝对是所有级别图像分析的不错选择。由于难以确定高级图像分析的确切要求,但是我们认为通用互连网络(例如超立方体)适合于相关任务,因此我们研究了在RH上模拟超立方体的问题。环形(或线性阵列),圆环(或网格)和二叉树是用于低级和中级图像分析算法开发的最常用拓扑。因此,为了证明RH在两个较低级别的图像分析中的可行性,我们介绍了将上述三种拓扑嵌入RH的技术。结果证明RH适用于所有级别的图像分析。

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