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New Iterative Framework for Frequency Response Mismatch Correction in Time-Interleaved ADCs: Design and Performance Analysis

机译:时间交错ADC中频率响应失配校正的新迭代框架:设计和性能分析

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This paper proposes a new iterative framework for the correction of frequency response mismatch in time-interleaved analog-to-digital converters. Based on a general time-varying linear system model for the mismatch, we treat the reconstruction problem as a linear inverse problem and establish a flexible iterative framework for practical implementation. It encumbrances a number of efficient iterative correction algorithms and simplifies their design, implementation, and performance analysis. In particular, an efficient Gauss–Seidel iteration is studied in detail to illustrate how the correction problem can be solved iteratively and how the proposed structure can be efficiently implemented using Farrow-based variable digital filters with few general-purpose multipliers. We also study important issues, such as the sufficient convergence condition and reconstructed signal spectrum, derive new lower bound of signal-to-distortion-and-noise ratio in order to ensure stable operation, and predict the performance of the proposed structure. Furthermore, we propose an extended iterative structure, which is able to cope with systems involving more than one type of mismatches. Finally, the theoretical results and the effectiveness of the proposed approach are validated by means of computer simulations.
机译:本文提出了一种新的迭代框架,用于校正时间交错模数转换器中的频率响应失配。基于失配的一般时变线性系统模型,我们将重构问题视为线性逆问题,并为实际实现建立了灵活的迭代框架。它阻碍了许多有效的迭代校正算法,并简化了它们的设计,实现和性能分析。特别是,详细研究了有效的高斯-赛德尔(Gauss-Seidel)迭代,以说明如何迭代地解决校正问题,以及如何使用基于Farrow的通用乘法器很少的可变数字滤波器有效地实现所提出的结构。我们还研究了重要问题,例如足够的收敛条件和重构的信号频谱,得出信噪比的新下限,以确保稳定的运行,并预测所提出结构的性能。此外,我们提出了一种扩展的迭代结构,该结构能够处理涉及不止一种类型的不匹配的系统。最后,通过计算机仿真验证了该方法的理论结果和有效性。

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