Design of a Novel Envelope Detector for Fast-Settling Circuits

摘要

A novel envelope detector structure that overcomes the traditional tradeoff required in these circuits, improving both the tracking and keeping of the signal, which is specially advantageous for fast-settling circuits, is proposed in this paper. The method relies on holding the signal by two capacitors in parallel, discharging one when the other is in the hold mode and employing the held signals to form the output. Results show a savings greater than 60% of the capacitor area for the same ripple ($≪$ 1%) and a release time constant that is 13 times smaller than that obtained by conventional circuits.