Current Stress Reduction for DC-Link Capacitors of Three-Phase VSI With Carrier-Based Continuous PWM

摘要

This article proposes a novel continuous pulsewidth modulation (CPWM) method to reduce dc-link current harmonics in voltage source inverters over wide range of load power factor. This modulation method contributes to a current stress reduction of dc-link smoothing capacitor and a suppression of its temperature rise. Furthermore, high-cost digital hardware, such as a field-programmable gate array, is not necessary because this modulation is implemented with only one carrier. The dc-link current harmonics are reduced by shifting voltage references in every half control period to reduce a fluctuation of the dc-link current around its average value. Experimental results confirm that the application of the proposed CPWM reduces the dc-link current harmonics by 24.2% at most and lowers an equilibrium capacitor temperature by 6.0 degrees C compared to the conventional CPWM.