Current Harmonic Reduction Based on Space Vector PWM for DC-Link Capacitors in Three-Phase VSIs Operating Over a Wide Range of Power Factor

摘要

This paper proposes a novel space vector pulsewidth modulation (SVPWM) strategy to reduce the switching-frequency-order inverter input current harmonics for a two-level three-phase voltage-source inverter operating over a wide range of the load power factor. The fluctuation of the inverter input current around its average value is minimized by optimization of the utilized voltage space vectors to reduce the inverter input current harmonics, which extends the lifetime of the dc-link electrolytic capacitors. Furthermore, the proposed strategy can be adapted to a motor drive system, where a wide variation of the load power factor is desired, by changing the optimized combinations of the voltage space vectors according to the polarities of the output phase currents. Experiments with the application of the novel SVPWM confirm that the inverter input current harmonics is reduced by up to 29.5% compared to that with the conventional SVPWM strategy. Moreover, the analytical and experimental results confirm that the proposed SVPWM reduces the inverter input current harmonics in both driving mode and regenerative braking mode, as well as with any load power factor.