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Feasibility Analysis for Dry Plasma Scribe Lane Etch for Die Separation in Compound Semiconductors

机译:用于化合物半导体中的管芯分离的干式等离子划线机蚀刻剂的可行性分析

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摘要

Die separation processes for compound semiconductor devices are typically based on either diamond scribe and break techniques or on ganged sawing of the substrate using water-cooled saws. These mechanically dependent processes can suffer from several limitations, including overall throughput of the process (and throughput scalability as wafer sizes increase), physical damage to the dies incurred during the sawing or scribing operation, and the real estate cost of needing large scribe lines or streets for relatively small devices like LEDs. A plasma etch process has been developed for compound semiconductor device die separation, eliminating the real estate penalty, physical damage caused by mechanical processes, and has no scaling issues associated with larger wafer diameters. This article will report on the overall benefits of the plasma etch die separation processes, offer some cost of ownership comparisons, and show results from work performed for LED die separation using plasma etch.
机译:用于化合物半导体器件的管芯分离工艺通常基于金刚石划片和折断技术或基于使用水冷锯的基板的成组锯切。这些与机械相关的过程可能会受到一些限制,包括过程的整体吞吐量(以及晶圆尺寸增加时的吞吐量可伸缩性),在锯切或划线操作期间对裸片造成的物理损坏以及需要大划线或LED等相对较小的设备的街道。已经开发出用于化合物半导体器件管芯分离的等离子体蚀刻工艺,消除了不动产损失,由机械工艺引起的物理损坏,并且不存在与较大晶片直径相关的缩放问题。本文将报告等离子蚀刻管芯分离工艺的总体优势,提供一些拥有成本的比较,并展示使用等离子蚀刻进行LED管芯分离所完成的工作结果。

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