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Parallelization of Quantum Circuits with Ancillae

机译:带有辅助线的量子电路的并行化

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In this paper, parallelization methods for quantum circuits are studied, where parallelization of quantum circuits means to reconstruct a given quantum circuit to one which realizes the same quantum computation with a smaller depth, and it is based on using additional bits, called ancillae, each of which is initialized to be in a certain state. We propose parallelization methods in terms of the number of available ancillae, for three types of quantum circuits. The proposed parallelization methods are more general than previous one in the sense that the methods are applicable when the number of available ancillae is fixed arbitrarily. As consequences, for the three types of n-bit quantum circuits, we show new upper bounds of the number of ancillae for parallelizing to logarithmic depth, which are 1/log n of previous upper bounds.
机译:在本文中,研究了量子电路的并行化方法,其中量子电路的并行化是指将给定的量子电路重构为以较小的深度实现相同量子计算的量子电路,并且该方法基于使用附加位(称为辅助位)的方式。其中的一个被初始化为处于特定状态。我们针对三种类型的量子电路,根据可用辅助电容的数量提出了并行化方法。所提出的并行化方法比以前的并行化方法更具通用性,因为当可用辅助项的数目任意固定时,该方法是适用的。结果,对于三种类型的n位量子电路,我们显示了平行于对数深度的辅助线数目的新上限,即先前上限的1 / log n。

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