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Noise-Induced Synchronization among Sub-RF CMOS Analog Oscillators for Skew-Free Clock Distribution

机译:Sub-RF CMOS模拟振荡器之间的噪声诱导同步,用于无偏斜时钟分配

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We present on-chip oscillator arrays synchronized by random noises, aiming at skew-free clock distribution on synchronous digital systems. Nakao et al. recently reported that independent neural oscillators can be synchronized by applying temporal random impulses to the oscillators [1], [2]. We regard neural oscillators as independent clock sources on LSIs; i.e., clock sources are distributed on LSIs, and they are forced to synchronize through the use of random noises. We designed neuron-based clock generators operating at sub-RF region (< 1 GHz) by modifying the original neuron model to a new model that is suitable for CMOS implementation with 0.25-μm CMOS parameters. Through circuit simulations, we demonstrate that i) the clock generators are certainly synchronized by pseudo-random noises and ii) clock generators exhibited phase-locked oscillations even if they had small device mismatches.
机译:我们介绍了由随机噪声同步的片上振荡器阵列,旨在在同步数字系统上实现无偏斜时钟分配。 Nakao等。最近报道,通过向振荡器施加时间随机脉冲,可以使独立的神经振荡器同步[1],[2]。我们将神经振荡器视为LSI上的独立时钟源。也就是说,时钟源分布在LSI上,并且它们被迫通过使用随机噪声进行同步。通过将原始神经元模型修改为适用于0.25μmCMOS参数的CMOS实现的新模型,我们设计了在亚RF区域(<1 GHz)运行的基于神经元的时钟发生器。通过电路仿真,我们证明i)时钟发生器肯定是由伪随机噪声同步的; ii)时钟发生器即使设备失配很小,也表现出锁相振荡。

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