A Low-Power High-Performance Vector-Pipeline DSP for Low-Rate Videophones

摘要

We propose a vector-pipeline processor VP- DSP for low-rate videophones which can encode and decode 10 frames/sec. of QCIF through a 29.2kbps low-rate line. We have already fabricated a VP-DSP LSI by a 0.35μm CMOS process. The area of the VP-DSP core is 4.26mm~2. It works properly at 25MHz/1.6V with a power consumption of 49mV. Its peak performance is up to 400MOPS, 8.2GOPS/W.