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首页> 外文期刊>IEICE Transactions on Electronics >A Spread-Spectrum Clock Generator Using Fractional-N PLL with an Extended Range ΣΔ Modulator
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A Spread-Spectrum Clock Generator Using Fractional-N PLL with an Extended Range ΣΔ Modulator

机译:使用小数N分频PLL和扩展范围ΣΔ调制器的扩频时钟发生器

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摘要

A spread-spectrum clock generator (SSCG) using fractional-N phase-locked loop (PLL) with an extended range sigma-delta (ΣΔ) modulator is presented in this paper. The proposed ΣΔ modulator simply adds an extra output bit in the first stage modulator. It can enlarge the input range about three times as compared to the conventional modulator and solve the saturation problem when the input exceeds the boundary of the conventional modulator. A flexible digital modulation controller can generate center and down spread-spectrum modulation and each has spread ratios of 0.4%, 0.8%, 1.6% and 3.2%. The proposed SSCG has been fabricated in TSMC 0.35-μm double-poly quadruple-metal CMOS process with output frequency of 300 MHz. The active area is 0.63 x 0.62 mm~2 and the power consumption is 17.5 mW.
机译:本文介绍了一种使用分数N锁相环(PLL)和扩展范围Σ-Δ调制器的扩频时钟发生器(SSCG)。提出的ΣΔ调制器只需在第一级调制器中添加一个额外的输出位。与常规调制器相比,它可以将输入范围扩大大约三倍,并且可以解决输入超出常规调制器边界时的饱和问题。灵活的数字调制控制器可以生成中心和下扩频调制,并且每个扩频比分别为0.4%,0.8%,1.6%和3.2%。拟议中的SSCG是采用台积电0.35-μm双多晶硅四金属CMOS工艺制造的,输出频率为300 MHz。有效面积为0.63 x 0.62 mm〜2,功耗为17.5 mW。

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