The prime-factor decomposition is a fast computational technique for many important digital signal processing operations, such as the convolution, the discrete Fourier transform, the discrete Hartley transform, and the discrete cosine transform (DCT). The authors present a new prime-factor algorithm for the DCT. They also design a prime-factor algorithm for the discrete sine transform based on the prime-factor DCT algorithm. Hardware implementations for the prime-factor DCT are also studied. They are especially interested in the hardware designs which are suitable for the VLSI implementations. They show three hardware designs for the prime-factor DCT, including a VLSI circuit fabricated directly according to the signal-flow graph, a linear systolic array, and a mesh-connected systolic array. These three designs show the trade-off between cost and performance. The methodology, which deals with general (N/sub 1//spl times/ N/sub 2/)-point DCTs, where N/sub 1/ and N/sub 2/ are mutually prime, is illustrated by converting a 15-point DCT problem into a (3/spl times/5)-point 2D DCT problem.
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机译：素因分解是许多重要数字信号处理操作的快速计算技术，例如卷积，离散傅里叶变换，离散Hartley变换和离散余弦变换（DCT）。作者提出了一种用于DCT的新素因算法。他们还基于素数DCT算法设计了用于离散正弦变换的素数算法。还研究了素数DCT的硬件实现。他们对适合VLSI实现的硬件设计特别感兴趣。他们展示了用于素数DCT的三种硬件设计，包括直接根据信号流图制造的VLSI电路，线性脉动阵列和网状脉动阵列。这三种设计显示了成本与性能之间的权衡。通过转换15-来说明处理一般（N / sub 1 // spl次/ N / sub 2 /）点DCT（其中N / sub 1 /和N / sub 2 /是互质的）的方法。点DCT问题变成（3 / spl times / 5）点2D DCT问题。
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