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Optimal Index-Bit Allocation for Dynamic Post-Correction of Analog-to-Digital Converters

机译:模数转换器动态后校正的最佳索引位分配

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Signal processing methods for digital post-correction of analog-to-digital converters (ADCs) are considered. ADC errors are in general signal dependent, and in addition, they often exhibit dynamic dependence. A novel dynamic post-correction scheme based on look-up tables is proposed. In order to reduce the table size and, thus, the hardware requirements, bit-masking is introduced. This is to limit the length of the table index by deselecting index bits. At this point, the problem of which bits to use arises. A mathematical analysis tool is derived, enabling the allocation of index bits to be analyzed. This analysis tool is applied in two optimization problems, optimizing the total harmonic distortion and the signal-to-noise and distortion ratio, respectively, of a corrected ADC. The correction scheme and the optimization problems are illustrated and exemplified using experimental ADC data. The results show that the proposed correction scheme improves the performance of the ADC. They also indicate that the allocation of index bits has a significant impact on the ADC performance, motivating the analysis tool. Finally, the optimization results show that performance improvements compared with static look-up table correction can be achieved, even at a comparable table size.
机译:考虑了用于模数转换器(ADC)的数字后校正的信号处理方法。 ADC错误通常取决于信号,此外,它们通常表现出动态依赖关系。提出了一种基于查询表的动态后校正方案。为了减小表的大小,从而减小硬件要求,引入了位掩码。这是通过取消选择索引位来限制表索引的长度。此时,出现使用哪个位的问题。派生了一个数学分析工具,可以分析索引位的分配。该分析工具应用于两个优化问题,分别优化了校正后的ADC的总谐波失真以及信噪比和失真比。使用实验ADC数据说明并举例说明了校正方案和优化问题。结果表明,提出的校正方案提高了ADC的性能。它们还表明,索引位的分配对ADC性能有重大影响,从而激励了分析工具。最后,优化结果表明,即使在可比较的表大小下,与静态查找表校正相比,也可以实现性能改进。

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