Scheduling semiconductor device test operations on multiheadtesters

摘要

Past attempts to devise scheduling methods for the device testnoperations of semiconductor manufacturing firms fail to address ansignificant characteristic of multiple-head test systems-the dependencynof processing rates on the lots processed simultaneously on the testers.nSince the problem has never been modeled accurately in the schedulingnliterature, feasibility and performance of previously proposednscheduling methodologies for multihead testers may not be accuratelynassessed. In this paper, we describe the multihead tester schedulingnproblem, present an enumeration solution procedure, and illustrate thenproblems of previously suggested tester scheduling algorithms