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Increasing the Immunity to Electromagnetic Interferences of CMOS OpAmps

机译:增加对CMOS OpAmp的电磁干扰的抵抗力

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This paper presents the successful design of a CMOS operational amplifier with enhanced immunity to electromagnetic interferences. Thanks to its strongly symmetrical topology, the amplifier exhibits an intrinsic robustness to interferences arising from a wide class of sources. Such a scheme, for the first time in the authors' knowledge, proves the effectiveness of symmetrical topologies to minimize the effects of electromagnetic interferences in operational amplifiers. The amplifier architecture is based on 2 identical stages: 2 fully differential source cross-coupled amplifiers with active loads. The circuit was fabricated in a 0.8μm n-well CMOS technology (AMS CYE process). Experimental results, in terms of EMI immunity, are presented and compared with a commercial amplifier. They show a low susceptibility to EMI conveyed both to the input and the power pins. The EMI effects on the proposed amplifier are reduced by more than one order of magnitude, compared to a commercial amplifier. Furthermore the amplifier overall measured performances are provided along with the corresponding simulation results.
机译:本文介绍了具有增强的抗电磁干扰能力的CMOS运算放大器的成功设计。得益于其强对称的拓扑结构,该放大器对各种来源产生的干扰具有固有的鲁棒性。在作者的知识中,这种方案首次证明了对称拓扑的有效性,可最大程度地减小运算放大器中的电磁干扰影响。该放大器架构基于两个相同的阶段:2个带有源负载的全差分源交叉耦合放大器。该电路采用0.8μmn阱CMOS技术(AMS CYE工艺)制造。提出了关于EMI抗扰度的实验结果,并与商用放大器进行了比较。它们对传递到输入引脚和电源引脚的EMI表现出较低的敏感性。与商用放大器相比,对拟议放大器的EMI影响降低了一个数量级以上。此外,还提供了放大器的整体测量性能以及相应的仿真结果。

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