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Very High Frequency PWM Buck Converters Using Monolithic GaN Half-Bridge Power Stages With Integrated Gate Drivers

机译:使用具有集成栅极驱动器的单片GaN半桥功率级的超高频PWM Buck转换器

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Integration is a key step in utilizing advances in GaN technologies and enabling efficient switched-mode power conversion at very high frequencies (VHF). This paper addresses design and implementation of monolithic GaN half-bridge power stages with integrated gate drivers optimized for pulsewidth-modulated (PWM) dc–dc converters operating at 100 MHz switching frequency. Three gate-driver circuit topologies are considered for integration with half-bridge power stages in a 0.15- m depletion-mode GaN-on-SiC process: an active pull-up driver, a bootstrapped driver, and a novel modified active pull-up driver. An analytical loss model is developed and used to optimize the monolithic GaN chips, which are then used to construct 20 V, 5 W, 100 MHz synchronous buck converter prototypes. With the bootstrapped and the modified pull-up gate-driver circuits, power stage efficiencies above 91% and total efficiencies close to 88% are demonstrated. The modified active pull-up driver, which offers 80% reduction in the driver area, is found to be the best-performing approach in the depletion-mode GaN process. These results demonstrate feasibility of high-efficiency VHF PWM dc–dc converters based on high levels of integration in GaN processes.
机译:集成是利用GaN技术的先进性并实现超高频(VHF)高效开关模式功率转换的关键步骤。本文介绍了具有集成栅极驱动器的单片GaN半桥功率级的设计和实现,该栅极驱动器针对在100 MHz开关频率下工作的脉宽调制(PWM)dc-dc转换器进行了优化。在0.15 m耗尽模式SiC上的GaN工艺中,考虑将三种栅极驱动器电路拓扑与半桥功率级集成:有源上拉驱动器,自举驱动器和新型改进的有源上拉电路司机。开发了一种分析损耗模型,并将其用于优化单片GaN芯片,然后将其用于构建20V,5W,100MHz同步降压转换器原型。使用自举和改进的上拉栅极驱动器电路,功率级效率超过91%,总效率接近88%。改进后的有源上拉驱动器可使驱动器面积减少80%,是耗尽型GaN工艺中性能最佳的方法。这些结果证明了基于GaN工艺高度集成的高效VHF PWM dc-dc转换器的可行性。

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