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首页> 外文期刊>Nanotechnology, IEEE Transactions on >Calibrated Nanoscale Dopant Profiling and Capacitance of a High-Voltage Lateral MOS Transistor at 20 GHz Using Scanning Microwave Microscopy
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Calibrated Nanoscale Dopant Profiling and Capacitance of a High-Voltage Lateral MOS Transistor at 20 GHz Using Scanning Microwave Microscopy

机译:使用扫描微波显微镜对20 GHz高压横向MOS晶体管进行校准的纳米级掺杂物分析和电容

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摘要

We quantitatively image the doping concentration and the capacitance of a high-voltage lateral metal-oxide-semiconductor transistor device with a channel length of 0.5 μm at 20-GHz frequency using scanning microwave microscopy (SMM). The transistor is embedded in a deep n-well forming a flat pn-junction with the p-substrate, with the shape of the pn-junction resolved in the SMM images. Calibrated dC/dV imaging of the device revealed doping concentration values in the range of 1015–1019 atoms/cm 3, including the p-body, n-drift region, n-source-diffusion, as well as all the pn-junctions and the silicon/oxide interfaces at a minimum feature size of 350 nm and SMM electrical resolution of 60 nm. SMM doping concentrations have been compared with technology computer-aided design simulations, resulting in a quantitative agreement between model and experiment. dC/dV images have been acquired at different tip dc bias voltages, allowing to determine the p and n dopant polarity. From the reflection scattering S11 signal calibrated capacitance measurements have been obtained from the various transistor regions in the range of 300 aF to 1 fF. The results suggest that both dC/dV dopant profiling and capacitance measurements can be used for quantitative nanoscale semiconductor device imaging.
机译:我们使用扫描微波显微镜(SMM)定量成像了在20 GHz频率下具有0.5μm沟道长度的高压侧向金属氧化物半导体晶体管器件的掺杂浓度和电容。晶体管嵌入在深n阱中,与p衬底形成平坦的pn结,在SMM图像中解析出pn结的形状。器件的校准dC / dV成像显示掺杂浓度值在1015–1019原子/ cm 3的范围内,包括p体,n漂移区,n源扩散,以及所有pn结和硅/氧化物界面的最小特征尺寸为350 nm,SMM电分辨率为60 nm。 SMM掺杂浓度已与计算机辅助设计模拟进行了比较,从而在模型和实验之间达成了定量协议。已在不同的尖端直流偏置电压下采集了dC / dV图像,从而可以确定p和n掺杂物的极性。根据反射散射S11,已从300 aF至1 fF范围内的各个晶体管区域获得了信号校准电容测量值。结果表明,dC / dV掺杂剂分布图和电容测量均可用于定量纳米级半导体器件成像。

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