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Shape and Positional Anisotropy Based Area Efficient Magnetic Quantum-Dot Cellular Automata Design Methodology for Full Adder Implementation

机译:完全加法器的基于形状和位置各向异性的面积有效磁量子点自动机设计方法

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摘要

Magnetic quantum-dot cellular automata (MQCA) based computation started emerging as the Moore's law approaching towards its end. Number of nanomagnets and the area occupancy are major constraints in materializing this MQCA-based digital arithmetic circuit design. In this letter, we propose a design methodology and demonstrate the hybrid approach of using slant edged input and 45$^circ$ aligned nanomagnets for optimized binary full adder design. Asymmetric shape anisotropy nanomagnets pave the way for standalone inputs, whereas positional anisotropy reduces the signal loss in transmission of data and enables lossless information propagation. This complementary property of both shape and positional anisotropy leads to exploiting the energy minimization nature of nanomagnets, reducing the design footprint. Further, to enable the multipurpose scaling, horizontal and vertical layouts of the nanomagnetic computing design of full adder has been proposed. Our proposed nanomagnetic adder architecture leads to 28% reduction in the total number of nanomagnets compared to the state of the art design, leading to an area efficient architectural design.
机译:随着摩尔定律接近尾声,基于磁性量子点细胞自动机(MQCA)的计算开始兴起。在实现这种基于MQCA的数字算术电路设计时,纳米磁体的数量和面积占用是主要限制。在这封信中,我们提出了一种设计方法,并演示了使用倾斜的边沿输入和45° Circ $对齐的纳米磁铁进行混合的方法,以优化二进制全加法器设计。非对称形状各向异性纳米磁铁为独立输入铺平了道路,而位置各向异性则减少了数据传输中的信号损耗并实现了无损信息传播。形状和位置各向异性的互补性质导致利用纳米磁体的能量最小化特性,从而减少了设计足迹。此外,为了实现多用途缩放,已经提出了全加法器的纳米磁计算设计的水平和垂直布局。与最先进的设计相比,我们提出的纳米磁性加法器体系结构可将纳米磁体的总数减少28%,从而实现了区域高效的体系结构设计。

著录项

  • 来源
    《IEEE transactions on nanotechnology》 |2018年第6期|1303-1307|共5页
  • 作者单位

    Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India;

    Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India;

    Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India;

    Integrated Nanodevices and Nanosystem Research Group, Department of Electrical and Computer Engineering, University of California, Davis, CA, USA;

    Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Adders; Perpendicular magnetic anisotropy; Magnetic domains; Logic gates; Layout; Anisotropic magnetoresistance;

    机译:加法器;垂直磁各向异性;磁畴;逻辑门;布局;各向异性磁阻;

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