机译:完全加法器的基于形状和位置各向异性的面积有效磁量子点自动机设计方法
Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India;
Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India;
Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India;
Integrated Nanodevices and Nanosystem Research Group, Department of Electrical and Computer Engineering, University of California, Davis, CA, USA;
Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India;
Adders; Perpendicular magnetic anisotropy; Magnetic domains; Logic gates; Layout; Anisotropic magnetoresistance;
机译:偶极耦合磁量子点蜂窝自动机的高效近似纳米磁性减法器和加法器设计方法
机译:使用基于量子点蜂窝自动机的方法的分层T(LT)逻辑减少方法的普通加法器和减法器的设计,分析和成本估计
机译:基于节能紧凑的二维二维两点单电子量子点细胞自动机的脉动进位加法器的设计与分析
机译:利用量子点元胞自动机有效设计十进制全加器
机译:量子点元胞自动机中的64位面积有效二进制加法器。
机译:量子点元胞自动机中高效全加器的设计
机译:Quantum-Dot蜂窝自动机技术中有效的完整加法器电路设计