REDUSA: module generation by automatic elimination of superfluous blocks in regular structures

摘要

An approach to module generation that does not require the construction of parametrized software procedures is presented. It is a design-by-example method that is based on the following concept: an example module (e.g., a 16-b multiplier) realizes a function between the set of input combinations and the set of output combinations. In many applications, only a subset of input combinations (e.g., 8-b instead of 16-b inputs) is used. The restriction of the module's function to this subset can be realized by a simpler module. REDUSA constructs this module automatically by a reduction of the example module. This approach offers important advantages in both the construction and verification aspected of module generators.