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Detection of catastrophic faults in analog integrated circuits

机译:检测模拟集成电路中的灾难性故障

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The IC fabrication process contains several testing stages. Because of the high cost of packaging, the testing stage prior to aging, called wafer probe, is key in reducing the overall manufacturing cost. Typically in this stage, specification tests are performed. Even though specification tests can certainly distinguish a good circuit from all faulty ones, they are expensive, and many types of faulty behavior can be detected by simpler tests. The construction of a set of measurements that detects many faulty circuits before specification testing is described. Bounds on these measurements are specified, and an algorithm for test selection is presented. An example of a possible simple test is a test of DC voltages (i.e., parametric tests). This type of test is defined rigorously, and its effectiveness in detecting faulty circuits is evaluated.
机译:IC制造过程包含几个测试阶段。由于封装成本高昂,老化之前的测试阶段(称为晶圆探针)是降低整体制造成本的关键。通常在此阶段执行规格测试。即使规格测试可以肯定地将一个好的电路与所有的故障电路区分开,但是它们很昂贵,并且可以通过更简单的测试来检测许多类型的故障行为。描述了在规格测试之前检测许多故障电路的一组测量的结构。指定了这些测量的界限,并提出了用于测试选择的算法。可能的简单测试的一个示例是直流电压测试(即参数测试)。严格定义此类测试,并评估其在检测故障电路中的有效性。

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