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首页> 外文期刊>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems >Automatic synthesis of extended burst-mode circuits. II. (Automatic synthesis)
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Automatic synthesis of extended burst-mode circuits. II. (Automatic synthesis)

机译:扩展突发模式电路的自动综合。二。 (自动合成)

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We introduce a new design style called extended burst-mode. The extended burst-mode design style covers a wide spectrum of sequential circuits ranging from delay-insensitive to synchronous. We can synthesize multiple-input change asynchronous finite state machines and many circuits that fall in the gray area (hard to classify as synchronous or asynchronous) which are difficult or impossible to synthesize automatically using existing methods. Our implementation of extended burst-mode machines uses standard CMOS logic, generates low-latency outputs, and guarantees freedom from hazards at the gate level. In Part II, we present a complete set of automated sequential synthesis algorithms: hazard-free state assignment, hazard-free state minimization, and critical-rare-free state encoding. Experimental data from a large set of examples are presented and compared to competing methods whenever possible.
机译:我们介绍了一种称为扩展突发模式的新设计样式。扩展的突发模式设计风格涵盖了从延迟不敏感到同步的一系列时序电路。我们可以合成多输入变化异步有限状态机,以及许多属于灰色区域(很难归类为同步或异步)的电路,这些电路很难或不可能使用现有方法自动合成。我们对扩展突发模式机器的实现使用标准CMOS逻辑,生成低延迟输出,并保证在门级不受危害。在第二部分中,我们介绍了一套完整的自动化顺序综合算法:无危害状态分配,无危害状态最小化和无临界稀疏状态编码。呈现了来自大量示例的实验数据,并在可能的情况下将其与竞争方法进行了比较。

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