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Synthesis of quantum-logic circuits

机译:量子逻辑电路的综合

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The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits (Proc. R. Soc. Lond. A, Math. Phys. Sci., vol. 425, p. 73, 1989) to the attention of the electronic design automation community (Proc. 40th ACM/IEEE Design Automation Conf., 2003), (Phys. Rev. A, At. Mol. Opt. Phy., vol. 68, p. 012318, 2003), (Proc. 41st Design Automation Conf., 2004), (Proc. 39th Design Automation Conf., 2002), (Proc. Design, Automation, and Test Eur., 2004), (Phys. Rev. A, At. Mol. Opt. Phy., vol. 69, p. 062321, 2004), (IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 22, p. 710, 2003). Efficient quantum-logic circuits that perform two tasks are discussed: 1) implementing generic quantum computations, and 2) initializing quantum registers. In contrast to conventional computing, the latter task is nontrivial because the state space of an n-qubit register is not finite and contains exponential superpositions of classical bitstrings. The proposed circuits are asymptotically optimal for respective tasks and improve earlier published results by at least a factor of 2. The circuits for generic quantum computation constructed by the algorithms are the most efficient known today in terms of the number of most expensive gates [quantum controlled-NOTs (CNOTs)]. They are based on an analog of the Shannon decomposition of Boolean functions and a new circuit block, called quantum multiplexor (QMUX), which generalizes several known constructions. A theoretical lower bound implies that the circuits cannot be improved by more than a factor of 2. It is additionally shown how to accommodate the severe architectural limitation of using only nearest neighbor gates, which is representative of current implementation technologies. This increases the number of gates by almost an order of magnitude, but preserves the asymptotic optimality of gate counts.
机译:古典计算的基本极限压力和来自量子效应的指数加速的希望最近带来了量子电路(Proc。R. Soc。Lond。A,Math。Phys。Sci。,第425卷,第73页,1989)引起电子设计自动化社区的注意(Proc。40th ACM / IEEE Design Automation Conf。,2003年),(Phys。Rev. A,At。Mol。Opt。Phy。,第68卷,第012318页,2003年) ,(第41届设计自动化大会,2004年),(第39届设计自动化大会,2002年),(第Pro,Design,Automation和Test Eur。,2004年),(Phys。Rev. A,At。Mol摘自Opt。Phy。,第69卷,第062321页,2004年)(IEEE跨计算辅助Des。Integr。Circuits Syst。,第22卷,第710页,2003年)。讨论了执行两个任务的高效量子逻辑电路:1)实现通用量子计算,以及2)初始化量子寄存器。与常规计算相反,后一个任务是不平凡的,因为n量子位寄存器的状态空间不是有限的,并且包含经典位串的指数叠加。拟议的电路对于各个任务而言是渐近最优的,并且将较早发布的结果改进了至少2倍。就最昂贵的门数量而言,由这些算法构建的用于通用量子计算的电路是当今最有效的[量子控制的]。 -NOT(CNOT)]。它们基于布尔函数的Shannon分解的模拟和称为量子多路复用器(QMUX)的新电路块,该电路块归纳了几种已知结构。理论上的下限意味着电路的改进不能超过2倍。还显示了如何适应仅使用最近邻门的严格架构限制,这代表了当前的实现技术。这将门的数量增加了几乎一个数量级,但保留了门数量的渐近最优性。

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