Design-for-Manufacturability Assessment for Integrated Circuits Using RADAR

摘要

Design for manufacturability (DFM) is essential because of the formidable challenges encountered in nano-scale integrated circuit (IC) fabrication. Unfortunately, it is difficult for designers to understand the cost-benefit tradeoff when tuning their design through DFM to achieve better manufacturability. This paper attempts to assist the designer in meeting this challenge by providing a methodology, called rule assessment of defect-affected regions (RADAR), which uses failing-IC diagnosis results to systematically evaluate the effectiveness of DFM rules. RADAR is applied to the fail data from a 90 nm Nvidia graphics processing unit to demonstrate its viability. Specifically, evaluation of various DFM rules revealed that via-enclosure rules play a more important role than the density-related rules. The yield impact of resolving violations is also quantified. In addition, comprehensive simulation experiments have shown RADAR to be accurate and effective for performing DFM evaluation.