Continuous-Time Sigma–Delta Modulator With a Fast Tracking Quantizer and Reduced Number of Comparators

摘要

Using a tracking analog-to-digital converter as the quantizer of a sigma–delta modulator (SDM) has been shown to be an efficient method of reducing the number of comparators. In this paper, a new continuous-time (CT) SDM is proposed where a large reduction in the number of comparators is obtained by clocking the quantizer tracking loop at a high frequency rate. For a given example, the number of bits of the quantizer is shown to be reduced from five in the original multibit modulator to only one in a quantizer with tracking sampled at three times the original sampling frequency. In addition, the output of the tracking quantizer can be downsampled so that the modulator output has the same resolution and sampling rate as the original modulator. In this way, the design of the digital-to-analog converters in the feedback loop and the decimator filter at the modulator output are not penalized. Furthermore, the digital integrator of the tracking loop can be removed by taking profit of the last CT integrator in the forward path. Finally, the signal component in the forward path can be attenuated by adding a direct path from the modulator input to the last integrator input. As a result, the output swing of the integrators is reduced, improving the linearity of the whole modulator. The new modulators are analyzed and extensive theoretical and simulation results are provided.