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Efficient Dithering in MASH Sigma-Delta Modulators for Fractional Frequency Synthesizers

机译:用于分数频率合成器的MASH Sigma-Delta调制器中的有效抖动

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The digital multistage-noise-shaping (MASH) $SigmaDelta$ modulators used in fractional frequency synthesizers are prone to spur tone generation in their output spectrum. In this paper, the state of the art on spur-tone-magnitude reduction is used to demonstrate that an $M$ -bit MASH architecture dithered by a simple $M$-bit linear feedback shift register (LFSR) can be as effective as more sophisticated topologies if the dither signal is properly added. A comparison between the existent digital $SigmaDelta$ modulators used in fractional synthesizers is presented to demonstrate that the MASH architecture has the best tradeoff between complexity and quantization noise shaping, but they present spur tones. The objective of this paper was to significantly decrease the area of the circuit used to reduce the spur tone magnitude for these MASH topologies. The analysis is validated with a theoretical study of the paths where the dither signal can be added. Experimental results of a digital $M$ -bit MASH 1-1-1 $SigmaDelta$ modulator with the proposed way to add the LFSR dither are presented to make a hardware comparison.
机译:分数频率合成器中使用的数字多级噪声整形(MASH)SigmaDelta $调制器易于在其输出频谱中产生音调。在本文中,利用降低杂音幅度的最新技术来证明,通过简单的$ M $位线性反馈移位寄存器(LFSR)抖动的$ M $位MASH体系结构可以达到与如果正确添加了抖动信号,则将获得更复杂的拓扑。比较了分数合成器中使用的现有数字SigmaDelta调制器,可以证明MASH体系结构在复杂度和量化噪声整形之间具有最佳折衷,但它们会产生杂音。本文的目的是显着减小用于减小这些MASH拓扑的杂散音幅值的电路面积。通过对可以添加抖动信号的路径进行理论研究来验证该分析。提出了带有建议的添加LFSR抖动的方法的数字$ M $位MASH 1-1-1 $ SigmaDelta $调制器的实验结果,以进行硬件比较。

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